The present invention relates to a method of determining a data transfer speed, and more particularly, to a method of determining a data transfer speed in an interface apparatus in conformity to IEEE1394.
The IEEE1394 protocol is known as a standard for an interface for transferring data such as audio data, image data and so on at a high speed between a personal computer and a peripheral device. The IEEE1394 protocol is advantageous in its high degree of freedom in bus topology which permits a daisy chain topology, a star topology, and so on.
A Data-Strobe Link (DS-LINK) coding scheme is employed for a transfer format of the IEEE1394 protocol. The DS-LINK coding scheme encodes a clock signal and a data signal to generate an encoded data signal and a strobe signal. When data having the same value are continuously output, the continuity of the data is represented by changing the value of the strobe signal. A clock signal is generated by performing an exclusive OR operation of the encoded data and the strobe signal.
The IEEE1394 protocol standardizes three data transfer speeds: 100 Mbps, 200 Mbps and 400 Mbps. Therefore, for transferring data between devices, a data transfer speed must be notified to the destination device by speed signaling each time data packets are transmitted. The device, that is notified of the data transfer speed, repeatedly transfers the received data packets to the next device at the notified data transfer speed.
The speed signaling is performed by supplying a bias signal to a signal line for the strobe signal of a 1394 cable. The bias signal is supplied for a fixed period (data prefix period) before the transmission of data packets. One of the data transfer speeds 100 Mbps, 200 Mbps, and 400 Mbps is specified depending on the analog level of the bias signal. A receiver recognizes a data transfer speed by detecting the analog level of the bias signal.
The recognition of the data transfer speed requires a strict detection of the analog level of the bias signal. Therefore, in a poor use environment which may involve an instable power supply, and so on, an error is likely to occur in the detection of the analog level of the bias signal.
Also, the detection of the analog level of the bias signal requires an analog-to-digital converter circuit which has a relatively large circuit area. Therefore, a larger semiconductor integrated circuit device must be built in an interface controller.
Further, negotiations for a data transfer speed performed in IEEE1394 impede an improvement in transfer efficiency.